The daughterboard interface

ArC TWO ships with a set of interchangeable daughterboards to cover a set of generic experimental requirements. As it is geniunely impossible to match all possible experimental setups the ArC TWO daughterboard facility is flexible and open enough to allow users to design new PCBs that implement their experimental logic.

The hardware interface

All daughterboards share the same footprint and they connect to the main ArC TWO board using two Samtec QSE-040-01-L-D-A-K-TR connectors. These expose all the analogue and digital pins of the board in a standardised manner.

Daughterboard footprint — ArC TWO daughterboard footprint. The annotations indicate the number of pins and the associated function. CH: analogue channels; IO: generic I/O; SEL: digital selector control; ARB_SUP: arbitrary analogue power supplies

There is no specific restriction imposed by ArC TWO on how a daughterboard must be populated as long as it fits in the designated footprint. Daughterboards can have active circuitry that can potentially be driven by the ArC TWO GPIOs as long as everything is wired up properly.

Daughterboard pinouts and channel allocations

All daughterboards that ship with ArC2 have their pins associated with a specific channel. Below you can find documentation on the ArC-daughterboard hardware interface as well as the current revision of channel-pin mappings for the standard daughterboards. Please note that our standard convention is that all channels are 0-indexed.

There are generally two broad categories of daughterboards. Active and passive. The former have active circuitry that can be driven from ArC TWO’s GPIOs whereas the latter just expose the required ArC TWO pins to a more useful interface such as a package socket or headers.

32NNA68

The standard 32NNA68 daughterboard is an active daughterboard meaning there is additional logic on-board to manage switching between the pins and the socket. When IO0 is HIGH ArC TWO is wired to the header banks, when LOW to the PLCC68 socket. 32NNA68 only exposes analogue pins to either the PLCC68 socket or the headers.

32BNC12

The 32BNC12 breaks out 12 analogue channels to BNC connectors. This is a passive daughterboard.

32SMA32

Similar to the 32BNC12 board, the 32SMA32 daughterboard exposes 32 analogue channels via SMA connectors. No active logic is exposed on board.

32SLP48DIP

The 32SLP48DIP daughterboard is a flexible characterisation platform for DIL/DIP packages. It features a ZIF socket for up to 48 pin (2×24) packages the pins of which can be flexibly allocated to analogue, digital or power supply ArC TWO channels. This is controlled by a set of headers along the sides of the ZIF socket that can be configured accordingly by shorting the specified pins with a jumper. For instance to connect pin #10 to a power supply a jumper must be inserted on Z/PWR position. This way pin #10 is connected to arbitrary PSU 3. To connect pin #19 to analogue channel 22 a jumper must be inserted on the equivalent Z/A position. Up to 24 pins can be broken out to the equivalent header pins on the daughterboard. A set of 8 ArC TWO digital channels is further exposed through the same header bank.